#
# Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
# SPDX-License-Identifier: X11
#


########################################################################
# NOTE: This is a tool-generated file and should not be edited manually.
########################################################################

# Core: u_ila_0
create_debug_core u_ila_0 ila
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 2 [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_DATA_DEPTH 4096 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL true [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_MEMORY_TYPE 1 [get_debug_cores u_ila_0]
set_property C_NUM_OF_PROBES 18 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
connect_debug_port u_ila_0/clk [get_nets [list {design_1_i/versal_cips_0/inst/pspmc_0/inst/pl0_ref_clk} ]]
set_property port_width 128 [get_debug_ports u_ila_0/probe0]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[0]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[1]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[2]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[3]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[4]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[5]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[6]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[7]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[8]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[9]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[10]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[11]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[12]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[13]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[14]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[15]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[16]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[17]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[18]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[19]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[20]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[21]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[22]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[23]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[24]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[25]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[26]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[27]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[28]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[29]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[30]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[31]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[32]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[33]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[34]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[35]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[36]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[37]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[38]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[39]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[40]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[41]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[42]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[43]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[44]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[45]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[46]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[47]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[48]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[49]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[50]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[51]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[52]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[53]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[54]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[55]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[56]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[57]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[58]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[59]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[60]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[61]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[62]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[63]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[64]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[65]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[66]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[67]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[68]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[69]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[70]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[71]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[72]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[73]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[74]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[75]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[76]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[77]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[78]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[79]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[80]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[81]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[82]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[83]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[84]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[85]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[86]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[87]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[88]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[89]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[90]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[91]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[92]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[93]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[94]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[95]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[96]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[97]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[98]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[99]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[100]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[101]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[102]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[103]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[104]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[105]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[106]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[107]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[108]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[109]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[110]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[111]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[112]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[113]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[114]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[115]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[116]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[117]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[118]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[119]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[120]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[121]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[122]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[123]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[124]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[125]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[126]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDATA[127]} ]]
create_debug_port u_ila_0 probe
set_property port_width 4 [get_debug_ports u_ila_0/probe1]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDEST[0]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDEST[1]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDEST[2]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TDEST[3]} ]]
create_debug_port u_ila_0 probe
set_property port_width 4 [get_debug_ports u_ila_0/probe2]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TID[0]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TID[1]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TID[2]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TID[3]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe3]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[0]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[1]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[2]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[3]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[4]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[5]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[6]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[7]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[8]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[9]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[10]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[11]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[12]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[13]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[14]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TKEEP[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 2 [get_debug_ports u_ila_0/probe4]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/mst_exec_state[0]} {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/mst_exec_state[1]} ]]
create_debug_port u_ila_0 probe
set_property port_width 128 [get_debug_ports u_ila_0/probe5]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[0]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[1]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[2]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[3]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[4]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[5]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[6]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[7]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[8]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[9]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[10]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[11]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[12]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[13]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[14]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[15]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[16]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[17]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[18]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[19]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[20]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[21]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[22]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[23]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[24]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[25]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[26]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[27]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[28]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[29]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[30]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[31]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[32]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[33]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[34]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[35]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[36]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[37]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[38]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[39]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[40]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[41]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[42]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[43]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[44]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[45]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[46]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[47]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[48]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[49]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[50]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[51]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[52]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[53]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[54]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[55]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[56]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[57]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[58]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[59]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[60]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[61]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[62]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[63]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[64]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[65]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[66]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[67]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[68]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[69]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[70]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[71]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[72]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[73]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[74]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[75]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[76]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[77]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[78]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[79]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[80]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[81]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[82]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[83]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[84]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[85]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[86]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[87]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[88]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[89]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[90]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[91]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[92]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[93]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[94]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[95]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[96]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[97]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[98]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[99]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[100]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[101]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[102]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[103]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[104]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[105]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[106]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[107]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[108]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[109]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[110]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[111]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[112]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[113]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[114]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[115]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[116]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[117]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[118]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[119]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[120]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[121]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[122]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[123]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[124]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[125]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[126]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDATA[127]} ]]
create_debug_port u_ila_0 probe
set_property port_width 4 [get_debug_ports u_ila_0/probe6]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDEST[0]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDEST[1]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDEST[2]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TDEST[3]} ]]
create_debug_port u_ila_0 probe
set_property port_width 4 [get_debug_ports u_ila_0/probe7]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TID[0]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TID[1]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TID[2]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TID[3]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe8]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[0]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[1]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[2]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[3]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[4]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[5]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[6]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[7]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[8]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[9]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[10]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[11]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[12]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[13]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[14]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TKEEP[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 2 [get_debug_ports u_ila_0/probe9]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/mst_exec_state[0]} {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/mst_exec_state[1]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_ARESETN} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_ARESETN} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
connect_debug_port u_ila_0/probe12 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TLAST} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe13]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
connect_debug_port u_ila_0/probe13 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TLAST} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe14]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
connect_debug_port u_ila_0/probe14 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TREADY} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe15]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
connect_debug_port u_ila_0/probe15 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TREADY} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe16]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
connect_debug_port u_ila_0/probe16 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[1].u_M_AXIS/M_AXIS_TVALID} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe17]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
connect_debug_port u_ila_0/probe17 [get_nets [list {_5_pl_axis_M_top_inst/genblk1[0].u_M_AXIS/M_AXIS_TVALID} ]]

